doi.org/10.1109/MDAT.2023.3310355
Preview meta tags from the doi.org website.
Linked Hostnames
2Thumbnail
Search Engine Appearance
SoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCs
Editor’s notes: This article introduces a novel debug unit enabling compositional postsilicon validation of heterogeneous SoCs. The unit’s effectiveness is demonstrated in post-silicon validation by integrating it into a 12-nm complex SoC prototype. —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India
Bing
SoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCs
Editor’s notes: This article introduces a novel debug unit enabling compositional postsilicon validation of heterogeneous SoCs. The unit’s effectiveness is demonstrated in post-silicon validation by integrating it into a 12-nm complex SoC prototype. —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India
DuckDuckGo
https://doi.org/10.1109/MDAT.2023.3310355SoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCs
Editor’s notes: This article introduces a novel debug unit enabling compositional postsilicon validation of heterogeneous SoCs. The unit’s effectiveness is demonstrated in post-silicon validation by integrating it into a 12-nm complex SoC prototype. —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India
General Meta Tags
25- titleSoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCs | IEEE Journals & Magazine | IEEE Xplore
- google-site-verificationqibYCgIKpiVF_VVjPYutgStwKn-0-KBB6Gw4Fc57FZg
- DescriptionEditor’s notes: This article introduces a novel debug unit enabling compositional postsilicon validation of heterogeneous SoCs. The unit’s effectiveness is demo
- Content-Typetext/html; charset=utf-8
- viewportwidth=device-width, initial-scale=1.0
Open Graph Meta Tags
3- og:titleSoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCs
- og:descriptionEditor’s notes: This article introduces a novel debug unit enabling compositional postsilicon validation of heterogeneous SoCs. The unit’s effectiveness is demonstrated in post-silicon validation by integrating it into a 12-nm complex SoC prototype. —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India
- og:imagehttps://ieeexplore.ieee.org/assets/img/ieee_logo_smedia_200X200.png
Twitter Meta Tags
1- twitter:cardsummary
Link Tags
9- canonicalhttps://ieeexplore.ieee.org/document/10234535/
- icon/assets/img/favicon.ico
- stylesheethttps://ieeexplore.ieee.org/assets/css/osano-cookie-consent-xplore.css
- stylesheet/assets/css/simplePassMeter.min.css?cv=20240820_00000
- stylesheet/assets/dist/ng-new/styles.css?cv=20240820_00000
Links
16- http://www.ieee.org/about/help/security_privacy.html
- http://www.ieee.org/web/aboutus/whatis/policies/p9-26.html
- https://doi.org/Xplorehelp
- https://doi.org/Xplorehelp/overview-of-ieee-xplore/about-ieee-xplore
- https://doi.org/Xplorehelp/overview-of-ieee-xplore/accessibility-statement