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https://dps8m.gitlab.io/blog/posts/20240622_FPGA

New Project:Hardware (FPGA) DPS-8/M ∕ FNP Project

We’re excited to announce an ambitious long-term project, currently in the early stages, to implement as much of the DPS‑8/M mainframe architecture as possible using one (or more) FPGAs — with the ability to run the full Multics operating system — is now underway, led by Dean S. Anderson. In the early 1980s, Dean started as a computer operator at Gelco on a large Honeywell Series‑60 ∕ Level‑66 dual processor mainframe (eventually converted to a four processor DPS‑8) running GCOS‑3. Over time, he worked his way through Gelco’s Production Control and Special Projects groups writing programs to automate the Computer Operations Department. This included writing GCOS‑3 kernel modifications for special handling of tapes.



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New Project:Hardware (FPGA) DPS-8/M ∕ FNP Project

https://dps8m.gitlab.io/blog/posts/20240622_FPGA

We’re excited to announce an ambitious long-term project, currently in the early stages, to implement as much of the DPS‑8/M mainframe architecture as possible using one (or more) FPGAs — with the ability to run the full Multics operating system — is now underway, led by Dean S. Anderson. In the early 1980s, Dean started as a computer operator at Gelco on a large Honeywell Series‑60 ∕ Level‑66 dual processor mainframe (eventually converted to a four processor DPS‑8) running GCOS‑3. Over time, he worked his way through Gelco’s Production Control and Special Projects groups writing programs to automate the Computer Operations Department. This included writing GCOS‑3 kernel modifications for special handling of tapes.



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https://dps8m.gitlab.io/blog/posts/20240622_FPGA

New Project:Hardware (FPGA) DPS-8/M ∕ FNP Project

We’re excited to announce an ambitious long-term project, currently in the early stages, to implement as much of the DPS‑8/M mainframe architecture as possible using one (or more) FPGAs — with the ability to run the full Multics operating system — is now underway, led by Dean S. Anderson. In the early 1980s, Dean started as a computer operator at Gelco on a large Honeywell Series‑60 ∕ Level‑66 dual processor mainframe (eventually converted to a four processor DPS‑8) running GCOS‑3. Over time, he worked his way through Gelco’s Production Control and Special Projects groups writing programs to automate the Computer Operations Department. This included writing GCOS‑3 kernel modifications for special handling of tapes.

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      We’re excited to announce an ambitious long-term project, currently in the early stages, to implement as much of the DPS‑8/M mainframe architecture as possible using one (or more) FPGAs — with the ability to run the full Multics operating system — is now underway, led by Dean S. Anderson. In the early 1980s, Dean started as a computer operator at Gelco on a large Honeywell Series‑60 ∕ Level‑66 dual processor mainframe (eventually converted to a four processor DPS‑8) running GCOS‑3. Over time, he worked his way through Gelco’s Production Control and Special Projects groups writing programs to automate the Computer Operations Department. This included writing GCOS‑3 kernel modifications for special handling of tapes.
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