dx.doi.org/10.1007/978-3-662-49896-5_12
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Efficient Zero-Knowledge Arguments for Arithmetic Circuits in the Discrete Log Setting
We provide a zero-knowledge argument for arithmetic circuit satisfiability with a communication complexity that grows logarithmically in the size of the circuit. The round complexity is also logarithmic and for an arithmetic circuit with fan-in 2 gates the...
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Efficient Zero-Knowledge Arguments for Arithmetic Circuits in the Discrete Log Setting
We provide a zero-knowledge argument for arithmetic circuit satisfiability with a communication complexity that grows logarithmically in the size of the circuit. The round complexity is also logarithmic and for an arithmetic circuit with fan-in 2 gates the...
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https://dx.doi.org/10.1007/978-3-662-49896-5_12Efficient Zero-Knowledge Arguments for Arithmetic Circuits in the Discrete Log Setting
We provide a zero-knowledge argument for arithmetic circuit satisfiability with a communication complexity that grows logarithmically in the size of the circuit. The round complexity is also logarithmic and for an arithmetic circuit with fan-in 2 gates the...
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